Sunday, 14 January 2018

CS501 Assignment # 02 Solution (17 January 2018)


Advance Computer Architecture (CS501)  Assignment # 02

Total marks =     20                                                                                                                                                                                                                                                  

Deadline:
17 January 2018



Please carefully read the following instructions before attempting assignment.


RULES FOR MARKING

It should be clear that your assignment would not get any credit if:
  • The assignment is submitted after the due date.
  • The submitted assignment does not open or file is corrupt.
  • Strict action will be taken if submitted solution is copied from any other student or from the internet.


You should concern the recommended book to clarify your concepts as handouts are not sufficient.


You are supposed to submit your assignment in .doc or docx format only.


Any other formats like scan images, PDF, zip, rar, ppt and bmp etc. will not be accepted.



NOTE

No assignment will be accepted after the due date via email in any case (load shedding or internet malfunctioning etc). Hence refrain from uploading assignment in the last hour of deadline. It is recommended to upload solution file at least two days before its closing date.


For any query, feel free to email at:



Assignment:                                                                                      

Suppose we have a Processor XYZ with the following specifications:

·         Processor speed is 1 GHz.
·         It takes 2500 clock cycles to carry out a context switch followed by starting an Interrupt Service Routine (ISR).
·         To execute an ISR, 5000 cycles are required.
·         The device makes 100 interrupt requests per second.
·         Moreover when there are no interrupts, the processor polls for every 0.7 milli-sec and 300 cycles are required to poll an I/O device.

Students are required to calculate:

a.       No of cycles/sec the processor spends for handling I/O provided interrupts are used only.
b.      Percentage of CPU time used in interrupts handling.
c.       No of cycles/sec spent in I/O when polling is also used with interrupts.
d.      How frequently the processor polls so that it incurs the same overhead as interrupts.








The End